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DF06M Arkusz danych(PDF) 16 Page - STMicroelectronics |
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DF06M Arkusz danych(HTML) 16 Page - STMicroelectronics |
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16 / 42 page ![]() AN1262 APPLICATION NOTE 16/42 10 CLAMP CIRCUIT DESIGN The drain pin of the IC needs to be properly clamped to prevent the spike due to the transformer leakage induc- tance from exceeding the breakdown voltage (700V minimum). An RCD clamp (see fig. 5a) is a popular cheap solution, however it dissipates power even under no-load conditions: there is at least the reflected voltage VR across the clamp resistor at all times. If minimizing the light load losses is a must, the use of a zener or transil clamp (see fig. 5b) is recommended whenever possible. Such circuit gives also a better defined clamping level but dissipates more power at full load. Figure 5. Suggested clamp circuit topologies The clamp may not be necessary in a 110VAC operated converter but, before giving up this circuit, it is important to check carefully the spike under overload and start-up conditions to make sure that the voltage rating of the MOSFET is never exceeded. RCD clamp. The clamp capacitor is charged by the energy stored in the leakage inductance and must ensure that the maximum allowed overvoltage Vspike is never exceeded, even under short circuit conditions (when the peak primary current is Ilim = 0.7 A). Its minimum value will be then: The capacitor must be low-loss type (with polypropylene or polystyrene film dielectric) to reduce power dissipa- tion and prevent overheating due to the high peak currents it experiences. The minimum value of the clamp resistance is: , a) R C D RCD CLAMP L6590 L6590D L6590A Drain GND b) D ZENER CLAMP DZ Drain GND L6590 L6590D L6590A C min L LK I lim 2 ⋅ V R V spik e + () 2 V R 2 – ---------------------------------------------------- = R min 1 f sw C min 1 V sp ik e V R ---------------- + ln ⋅⋅ ------------------------------------------------------------------- = |
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