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CS5308GDWR28 Arkusz danych(PDF) 25 Page - ON Semiconductor

Numer części CS5308GDWR28
Szczegółowy opis  Two?뭁hase PWM Controller with Integrated Gate Drivers for VRM 8.5
PDF  31 Pages
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CS5308GDWR28 Arkusz danych(HTML) 25 Page - ON Semiconductor

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saturating, the differential input voltage from CSREF to CSn
(n = 1 or 2) must satisfy the following equation:
VCSREF,MAX ) VCOn,MAX ) 310 mV @ D v 2.45 V
(35)
where:
VCSREF,MAX + Max VID Setting w AVP @ Full Load
VCOn,MAX + [VCSn * VCSREF] @ GCSA,MAX
+ (IO,MAX 2 ) DILo 2) @ RMAX
@ GCSA,MAX
RMAX + RSENSE or (RL,MAX ) RPCB,MAX)
11. VTTPGD Delay Time Setting
The VTTPGD signal is pulled LOW a predetermined delay
time (TD,VTT) after the VTT voltage crosses the VTT
Threshold. The VTTCT charge current and the capacitor
value from the VTTCT pin to ground (CVTT) determine the
TD,VTT delay time. However, the choice of oscillator
frequency and the value of ROSC set the VTTCT charge
current as shown in Figure 4. Therefore, delay time is simply
set by the value of CVTT according to the following
equation:
TD,VTT + (1 V * 0.25V) @ CVTT VTTCT_Current (36)
12. Soft Start Time
The Soft Start time (TSS) can be calculated from:
TSS + (VCOMP * RCMP1 @ ICOMP) @ CCMP2 ICOMP
(37)
where:
VCOMP + VOUT @0 A ) Channel_Startup_Offset
) Int_Ramp ) GCSA @ Ext_Ramp 2
ICOMP is the COMP source current from the data sheet.



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