622 Mbps Clock and Data Recovery IC

ADN2806

Rev. 0

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FEATURES

Exceeds SONET requirements for jitter transfer/

generation/tolerance

Patented clock recovery architecture

No reference clock required

Loss-of-lock indicator

Single-supply operation: 3.3 V

Low power: 359 mW typical

5 mm × 5 mm, 32-lead LFCSP, Pb free

APPLICATIONS

BPON ONT

SONET OC-12

WDM transponders

Regenerators/repeaters

Test equipment

Broadband cross-connects and routers

GENERAL DESCRIPTION

The ADN2806 provides the receiver functions for clock and

data recovery, and data retiming for 622 Mbps NRZ data. The

ADN2806 automatically locks to 622 Mbps data without the

need for an external reference clock or programming. In the

absence of input data, the output clock drifts no more than

±5%. All SONET jitter requirements are met, including jitter

transfer, jitter generation, and jitter tolerance. All specifications

are quoted for −40°C to +85°C ambient temperature, unless

otherwise noted.

This device, together with a PIN diode, TIA preamplifier, and a

lim amp can implement a highly integrated, low cost, low power

fiber optic receiver.

The ADN2806 is available in a compact 5 mm × 5 mm,

32-lead LFCSP.

FUNCTIONAL BLOCK DIAGRAM

2

LOL

DATAOUTP/

DATAOUTN

CLKOUTP/

CLKOUTN

ADN2806

2

VCC

VEE

CF1

CF2

PIN

NIN

VREF

BUFFER

VCO

PHASE

SHIFTER

PHASE

DETECT

FREQUENCY

DETECT

DATA

RE-TIMING

LOOP

FILTER

LOOP

FILTER

REFCLKP/REFCLKN

(OPTIONAL)

Figure 1.