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IDT7134LA55L48I Arkusz danych(PDF) 8 Page - Integrated Device Technology |
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IDT7134LA55L48I Arkusz danych(HTML) 8 Page - Integrated Device Technology |
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8 / 11 page  IDT7134SA/LA High-Speed 4K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges 8 AC Electrical Characteristics Over the Operating Temperature and Supply Voltage(5,7) NOTES: 1. Transition is measured ±500mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 4. Port-to-port delay through RAM cells from writing port to reading port, refer to Timing Waveform of Write with Port-to-Port Read. 5. 'X' in part number indicates power rating (SA or LA). 6. tDDD = 35ns for military temperature range. 7. Industrial temperature: for other speeds, packages and powers contact your sales office. Symbol Parameter 7134X20 Com'l Only 7134X25 Com'l & Military 7134X35 Com'l & Military Unit Min. Max. Min. Max. Min. Max. WRITE CYCLE tWC Write Cycle Time 20 ____ 25 ____ 35 ____ ns tEW Chip Enable to End-of-Write 15 ____ 20 ____ 30 ____ ns tAW Address Valid to End-of-Write 15 ____ 20 ____ 30 ____ ns tAS Address Set-up Time 0 ____ 0 ____ 0 ____ ns tWP Write Pulse Width 15 ____ 20 ____ 25 ____ ns tWR Write Recovery Time 0 ____ 0 ____ 0 ____ ns tDW Data Valid to End-of-Write 15 ____ 15 ____ 20 ____ ns tHZ Output High-Z Time(1,2) ____ 15 ____ 15 ____ 20 ns tDH Data Hold Time(3) 0 ____ 0 ____ 3 ____ ns tWZ Write Enable to Output in High-Z(1,2) ____ 15 ____ 15 ____ 20 ns tOW Output Active from End-of-Write(1,2,3) 3 ____ 3 ____ 3 ____ ns tWDD Write Pulse to Data Delay(4) ____ 40 ____ 50 ____ 60 ns tDDD Write Data Valid to Read Data Delay(4,6) ____ 30 ____ 30 ____ 35 ns 2720 tbl 10a Symbol Parameter 7134X45 Com'l & Military 7134X55 Com'l, Ind & Military 7134X70 Com'l & Military Unit Min. Max. Min. Max. Min. Max. WRITE CYCLE tWC Write Cycle Time 45 ____ 55 ____ 70 ____ ns tEW Chip Enable to End-of-Write 40 ____ 50 ____ 60 ____ ns tAW Address Valid to End-of-Write 40 ____ 50 ____ 60 ____ ns tAS Address Set-up Time 0 ____ 0 ____ 0 ____ ns tWP Write Pulse Width 40 ____ 50 ____ 60 ____ ns tWR Write Recovery Time 0 ____ 0 ____ 0 ____ ns tDW Data Valid to End-of-Write 20 ____ 25 ____ 30 ____ ns tHZ Output High-Z Time(1,2) ____ 20 ____ 25 ____ 30 ns tDH Data Hold Time(3) 3 ____ 3 ____ 3 ____ ns tWZ Write Enable to Output in High-Z(1,2) ____ 20 ____ 25 ____ 30 ns tOW Output Active from End-of-Write(1,2,3) 3 ____ 3 ____ 3 ____ ns tWDD Write Pulse to Data Delay(4) ____ 70 ____ 80 ____ 90 ns tDDD Write Data Valid to Read Data Delay(4,6) ____ 45 ____ 55 ____ 70 ns 2720 tbl 10b |
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