LXT6155LE datasheet(26/50 Pages) INTEL

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LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver

Datasheet

3.0

There are a total of sixteen (16) control registers in the LXT6155 addressed by the lowest four

address bits, A<3:0>. See Tables 8 through 22 for details .

Table 6.

Device Address/Control Byte

A<6:0>

Description

A<6:5>

LXT6155 Device Select. By using pins ADDR1 and ADDR0, up to four LXT6155 devices can be addressed. For a

successful data transaction to occur, A6 and A5 must match the polarity settings on ADDR1 and ADDR0,

respectively. Using these controls, up to four LXT6155 devices can be independently controlled.

Not Used. Set to 0 during transactions.

A<3:0>

LXT6155 Register Map (see Table 7).

Table 7.

LXT6155 Register Map (A<3:0>)

A<3:0>

Type

0000

Primary Control

R/W

0001

Transmit Control

R/W

0010

Transmit PLL1

R/W

0011

Transmit PLL2

R/W

0100

Equalizer load

R/W

0101

Equalizer/AGC

R/W

0110

Matching filter2

R/W

0111

Slicer

R/W

1000

Receive PLL 1

R/W

1001

Receive PLL 2

R/W

1010

Test

R/W

1011

Reset and Bias

R/W

1100

Receive Digital 1

R/W

1101

Receive Digital 2

R/W

1110

Status/Interrupt Control

R/W

1111

Status/Interrupt Output

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