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PL485 Arkusz danych(PDF) 4 Page - Microchip Technology |
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PL485 Arkusz danych(HTML) 4 Page - Microchip Technology |
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4 / 22 page ![]() • I/O(2): – Up to 48 I/O lines with external interrupt capability (edge or level), debouncing, glitch filtering and on-die series resistor termination. Individually programmable open-drain, pull-up and pull-down resistor and synchronous output – Two PIO Controllers provide control of up to 48 I/O lines • Analog: – One 8-channel ADC, resolution up to 12 bits, sampling rate up to 500 ksps • Package: available in TFBGA-121 • Temperature Range: Industrial (-40ºC to +85ºC) Note: 1. 100 MHz with VDDCOREXT100 or with VDDCORE trimmed by regulator. 2. Communication between SAMG55 and PL360 blocks requires some peripherals and GPIOs which will not be available for other uses. Please, refer to section 5.3 Recommended SAMG55-PL360 Connection for more information about connection between SAMG55 and PL360 blocks. Features © 2020 Microchip Technology Inc. Datasheet 60001600B-page 4 |
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