MCP3421 datasheet(12/30 Pages) MICROCHIP

12 / 30 page

MCP3421

DS22003B-page 12

In read mode, the RDY bit in the configuration byte

indicates the state of the conversion: (a) RDY = 1

indicates that the data bytes that have just been read

were not updated from the previous conversion. (b)

RDY = 0 indicates that the data bytes that have just

been read were updated.

If the configuration byte is read repeatedly by clocking

continuously after the first read (i.e., after the 5th byte

in the 18-bit conversion mode), the state of the RDY bit

indicates whether the device is ready with new

conversion data. See Figure 5-2. For example,

RDY = 0 means new conversion data is ready for read-

ing. In this case, the user can send a stop bit to exit the

current read operation and send a new read command

to read out updated conversion data. See Figures 5-2

and 5-3 for reading conversion data. The user can

rewrite the configuration byte any time for a new

setting. Tables 5-1 and 5-2 show the examples of the

configuration bit operation.

5.3

I2C Serial Communications

The MCP3421 device communicates with Master

(microcontroller) through a serial I2C (Inter-Integrated

Circuit)

interface

and

supports

standard

(100 kbits/sec), fast (400 kbits/sec) and high-speed

(3.4 Mbits/sec) modes. The serial I2C is a bidirectional

2-wire data bus communication protocol using open-

drain SCL and SDA lines.

The MCP3421 can only be addressed as a slave. Once

addressed, it can receive configuration bits or transmit

the latest conversion results. The serial clock pin (SCL)

is an input only and the serial data pin (SDA) is

bidirectional. An example of a hardware connection

diagram is shown in Figure 6-1.

The Master starts communication by sending a START

bit and terminates the communication by sending a

STOP bit. The first byte after the START bit is always

the address byte of the device, which includes the

device code, the address bits, and the R/W bit. The

device code for the MCP3421 device is 1101. The

address bits (A2, A1, A0) are pre-programmed at the

factory. In general, the address bits are specified by the

customer when they order the device. The three

address bits are programmed to “000” at the factory, if

they are not specified by the customer. Figure 5-1

shows the details of the MCP3421 address byte.

During a low power standby mode, SDA and SCL pins

remain at a floating condition.

More details of the I2C bus characteristic is described

in Section 5.6 “I2C Bus Characteristics”.

5.3.1

DEVICE ADDRESSING

The address byte is the first byte received following the

START condition from the Master device. The

MCP3421 device code is 1101. The device code is

followed by three address bits (A2, A1, A0) which are

programmed at the factory. The three address bits

allow up to eight MCP3421 devices on the same data

bus line. The (R/W) bit determines if the Master device

wants to read the conversion data or write to the

Configuration register. If the (R/W) bit is set (read

mode), the MCP3421 outputs the conversion data in

the following clocks. If the (R/W) bit is cleared (write

mode), the MCP3421 expects a configuration byte in

the following clocks. When the MCP3421 receives the

correct address byte, it outputs an acknowledge bit

after the R/W bit. Figure 5-1 shows the MCP3421

address byte. See Figures 5-2 and 5-3 for the read and

write operations of the device.

TABLE 5-1:

CONFIGURATION BITS FOR

WRITING

R/W O/C RDY

Operation

No effect if all other bits remain

the same - operation continues

with the previous settings

Initiate One-Shot Conversion

Initiate Continuous Conversion

TABLE 5-2:

CONFIGURATION BITS FOR

READING

R/W O/C RDY

Operation

New conversion data in One-

Shot conversion mode has been

just read. The RDY bit remains

low until set by a new write

command.

One-Shot Conversion is in

progress, The conversion data is

not updated yet. The RDY bit

stays high.

New conversion data in Continu-

ous Conversion mode has been

just read. The RDY bit changes

to high after this read.

The conversion data in Continu-

ous Conversion mode was

already read. The latest conver-

sion data is not ready. The RDY

bit stays high until a new

conversion is completed.

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