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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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WM8216SEFL/R Arkusz danych(PDF) 23 Page - Wolfson Microelectronics plc |
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WM8216SEFL/R Arkusz danych(HTML) 23 Page - Wolfson Microelectronics plc |
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23 / 27 page  WM8216 Production Data w PD Rev 4.0 March 2007 23 REGISTER BIT NO BIT NAME(S) DEFAULT DESCRIPTION 3:0 RLCDAC[3:0] 1111 Controls RLCDAC driving VRLC/VBIAS pin to define single ended signal reference voltage or Reset Level Clamp voltage. See Electrical Characteristics section for ranges. 5:4 CDSREF[1:0] 01 CDS mode reset timing adjust. 00 = Advance reset sample by 1 MCLK period (relative to default). 01 = Default reset sample position. 10 = Delay reset sample by 1 MCLK period (relative to default) 11 = Delay reset sample by 2 MCLK periods (relative to default) When MONO=0 this register bit has no effect Monochrome mode channel select. 6 CHAN 0 00 = Odd channel select 01 = Even channel select Setup Register 3 7 Not Used 0 Must be set to 0 Software Reset Any write to Software Reset causes all register bits to be reset. It is recommended that a software reset be performed after a power-up before any other register writes. 0 ODDPD 0 When set powers down odd S/H, PGA 1 EVENPD 0 When set powers down even S/H, PGA 3 ADCPD 0 When set powers down ADC. Allows reduced power consumption without powering down the references which have a long time constant when switching on/off due to the external decoupling capacitors. 4 VRLCDACPD 0 When set powers down 4-bit RLCDAC, setting the output to a high impedance state and allowing an external reference to be driven in on the VRLC/VBIAS pin. 5 ADCREFPD 0 When set disables VRT, VRB buffers to allow external references to be used. 6 VRXPD 0 When set disables VRX buffer to allow an external reference to be used. Setup Register 5 7 Not Used 0 Must be set to 0 4:0 Not Used 00000 Must be set to 0 5 RLCEN 1 Reset Level Clamp Enable. When set Reset Level Clamping is enabled. The method of clamping is determined by CLAMPCTRL. 6 CLAMPCTRL 0 0 = RLC switch is controlled directly from RSMP input pin: RSMP = 0: switch is open RMSP = 1: switch is closed 1 = RLC switch is controlled by logical combination of RSMP and VSMP. RSMP && VSMP = 0: switch is open RSMP && VSMP = 1: switch is closed Setup Register 6 7 Not Used 0 Must be set to 0 |
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