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SY100S336 Arkusz danych(PDF) 8 Page - Micrel Semiconductor |
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SY100S336 Arkusz danych(HTML) 8 Page - Micrel Semiconductor |
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8 / 10 page ![]() 8 SY100S336 Micrel, Inc. M9999-032206 hbwhelp@micrel.com or (408) 955-1690 TIMING DIAGRAMS Propagation Delay (Serial Data, Selects) Set-up and Hold Time Notes: 1. VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND. 2. tS is the minimum time before the transition of the clock that information must be present at the data input. 3. tH is the minimum time after the transition of the clock that information must remain unchanged at the data input. OUTPUT INPUT 20% 80% 50% tPHL tPLH tTLH tTHL 0.7 ± 0.1 ns 0.7 ± 0.1 ns –0.95V –1.69V 20% 80% 50% CLOCK 50% –1.69V D3, Pn, Sn tS 50% tH –0.95V –1.69V –0.95V 50% –1.69V CEP tS tH –0.95V ENABLE COUNT INHIBIT COUNT |
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