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ADC3683 Arkusz danych(PDF) 41 Page - Texas Instruments |
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ADC3683 Arkusz danych(HTML) 41 Page - Texas Instruments |
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41 / 70 page ![]() 7.4.3 Digital Channel Averaging The ADC3683-SP includes a digital channel averaging feature which enables improvement of the ADC dynamic range (see Figure 7-46). The same input signal is given to both ADC inputs externally, and the output of the two ADCs is averaged internally. By averaging, uncorrelated noise (such as, ADC thermal noise) improves 3dB while correlated noise (such as, jitter in the clock path, reference noise) is unaffected. Therefore, the averaging gives close to 3dB improvement at low input frequencies but less at high input frequencies where clock jitter dominates the SNR. The output from the digital averaging block is given out on the digital outputs of channel A, or can be routed to the digital decimation filters using the digital mux. ADC N NCO N NCO MUX AVG ADC External Internal Figure 7-46. Digital Channel Averaging Diagram www.ti.com ADC3683-SP SBASAB5 – MARCH 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: ADC3683-SP |
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