 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
S12SCIV2/D Arkusz danych(PDF) 58 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
S12SCIV2/D Arkusz danych(HTML) 58 Page - Freescale Semiconductor, Inc |
|
|
58 / 130 page  MC9S12H256 Device User Guide — V01.18 2.2 Signal Properties Summary Table 2-1 summarizes all pin functions. NOTE: Bold entries determine pins not available on 112-pin LQFP. Table 2-1 Signal Properties Pin Name Function 1 Pin Name Function 2 Pin Name Function 3 Pin Name Function 4 Powered by Internal Pull Resistor Description CTRL Reset State EXTAL — — — VDDPLL None None Oscillator Pins XTAL — — — VDDPLL RESET — — — VDDX2 External Reset Pin TEST — — — VDDX2 Test Input XFC — — — VDDPLL PLL Loop Filter BKGD TAGHI MODC — VDDX2 Always Up Up Background Debug, Tag High, Mode Pin PAD[7:0] AN[7:0] — — VDDA None None Port AD Inputs, Analog Inputs (ATD) PAD[15:8] AN[15:8] — — VDDA Port AD Inputs, Analog Inputs (ATD) PA[7:0] FP[15:8] ADDR[15:8]/ DATA[15:8] — VDDX1 PUCR/ PUPAE Down Port A I/O, Multiplexed Address/Data PB[7:0] FP[7:0] ADDR[7:0]/ DATA[7:0] — VDDX1 PUCR/ PUPBE Down Port B I/O, Multiplexed Address/Data PE7 FP22 XCLKS NOACC VDDX1 PUCR/ PUPEE Down Port E I/O, Access, Clock Select, LCD driver PE6 IPIPE1 MODB — VDDX2 While RESET pin is low: Down Port E I/O, Pipe Status, Mode Input PE5 IPIPE0 MODA — VDDX2 Port E I/O, Pipe Status, Mode Input PE4 ECLK — — VDDX2 PUCR/ PUPEE Mode de- pendent Port E I/O, Bus Clock Output PE3 FP21 LSTRB TAGLO VDDX1 Port E I/O, LCD driver, Byte Strobe, Tag Low PE2 FP20 R/W — VDDX1 Port E I/O, R/W in expanded modes PE1 IRQ — — VDDX2 Up Port E Input, Maskable Interrupt PE0 XIRQ — — VDDX2 Port E Input, Non Maskable Interrupt PH[7:0] KWH[7:0] — — VDDM PERH/ PPSH Disabled Port H I/O, Interrupts PJ[3:0] KWJ[3:0] — — VDDX1 PERJ/ PPSJ Disabled Port J I/O, Interrupts PK7 FP23 ECS ROMONE VDDX1 PUCR/ PUPKE Down Port K I/O, Emulation Chip Select, ROM On Enable PK[3:0] BP[3:0] XADDR[17:14] — VDDX1 Port K I/O, LCD driver, Extended Addresses PL[3:0] FP[19:16] — — VDDX1 PERL/ PPSL Down Port L I/O, LCD drivers PL[7:4] FP[31:28] — — VDDX1 Port L I/O, LCD drivers Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
