MPC8280 datasheet(35/80 Pages) FREESCALE

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MPC8280 PowerQUICC II™ Family Hardware Specifications, Rev. 1.7

Freescale Semiconductor

Clock Configuration Modes

7.3 PCI Agent Mode

Table 19 and Table 20 show configurations for PCI agent mode. The frequencies listed are for the purpose of

illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not

exceed the frequency rating of the user’s device. In addition, note the following:

NOTE: PCI_MODCK

In PCI mode only, PCI_MODCK comes from the LGPL5 pin and

MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.

NOTE: Tval (Output Hold)

The minimum Tval = 2 ns when PCI_MODCK = 1, and the minimum Tval = 1 ns

when PCI_MODCK = 0. Therefore, designers should use clock configurations that

fit this condition to achieve PCI-compliant AC timing.

1110_010

50.0

100.0

150.0 300.0

4.5

225.0 450.0

25.0 50.0

1110_011

50.0

100.0

150.0 300.0

250.0 500.0

25.0 50.0

1110_100

50.0

100.0

150.0 300.0

5.5

275.0 550.0

25.0 50.0

1100_000

Reserved

1100_001

Reserved

1100_010

Reserved

The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table

entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration

only. Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency

rating of the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock

mode. For modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial

temperature devices and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5:

for Rev0.1 the minimum CPU frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for

commercial temperature devices and 175 MHz for extended temperature devices.

As Table 15 shows, PCI_MODCK determines the PCI clock frequency range. Refer to Table 17 for higher configurations.

MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.

60x and local bus frequency. Identical to CLKIN.

CPM multiplication factor = CPM clock/bus clock

CPU multiplication factor = Core PLL multiplication factor

Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 1, 2 (continued)

Mode 3

Bus Clock 4

(MHz)

CPM

Multiplication

Factor 5

CPM Clock

(MHz)

CPU

Multiplication

Factor 6

CPU Clock

(MHz)

PCI

Division

Factor

PCI Clock

(MHz)

MODCK_H-

MODCK[1-3]

Low

High

Low

High

Low

High

Low High

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