2-3
RF2172
Rev A11 030729
Pin
Function
Description
Interface Schematic
1GND
Ground connection. For best performance, keep traces physically short
and connect immediately to the ground plane.
2GND
Ground connection for the driver stage. For best performance, keep
traces physically short and connect immediately to the ground plane.
3RF IN
RF input. This is a 50
Ω input. No external matching is needed. An
external DC blocking capacitor is required if this port is connected to a
DC path to ground or a DC voltage.
See pin 15.
4GND
See pin 1.
5GND
See pin 1.
6
VPD
Power down pin. When this pin is 0V, the device will be in power down
mode, dissipating minimum DC power. This pin also serves as the VCC
supply pin for the bias circuitry. VPD should be at the supply voltage
when the part is not in power down mode.
7APC
Analog power control. Output power varies as a function of the voltage
on this pin. See graph. This pin must be driven through a series resistor
with a voltage between 0V and VCC. Series resistor determines
dynamic range of power control. See plot “POUT versus Gain Control
versus Gain Control Resistor”.
8GND
See pin 1.
9GND
See pin 1.
10
GND
See pin 1.
11
RF OUT
RF output. An external matching network is required to provide the opti-
mum load impedance at this pin.
See pin 15.
12
RF OUT
RF output and power supply for the output stage. Bias voltage for the
output stage is provided through this pin. A shunt cap resonating with
the bond wire inductance at 2xf0 can also be used at this pin to provide
a second harmonic trap.
See pin 15.
13
GND
See pin 1.
14
GND
See pin 1.
15
VCC
Power supply for driver stage and interstage matching. This pin forms
the shunt inductance needed for proper tuning of the interstage. Refer
to the application schematic for the proper configuration. Note: Position
and value of the components are important.
16
GND
See pin 1.
Pkg
Base
GND
Ground connection for the output stage. This pad should be connected
to the groundplane by vias directly under the device. A short path is
required to obtain optimum performance, as well as provide a good
thermal path to the PCB for maximum heat dissipation.
APC
Bias
Network
RF IN
1st
Stage
GND
External Cap
V
CC
Inductor
Bond
Wire
Pin 15
RF OUT
1st Stage
2nd Stage
RF IN
RF OUT
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