SP7655ERLSLASHTR datasheet(6/16 Pages) SIPEX

6 / 16 page

Rev E: 3/2/07

SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator

THEORY OF OPERATION

as simple as an RC circuit to Ground. If a more

complex compensation is required, then the

amplifier has enough bandwidth (45° at 4 MHz)

and enough gain (60dB) to run Type III compen-

sation schemes with adequate gain and phase

margins at crossover frequencies greater than

50kHz.

The common mode output of the error amplifier

is 0.9V to 2.2V. Therefore, the PWM voltage

ramp has been set between 1.1V and 2.2V to

ensure proper 0% to 100% duty cycle capability.

The voltage loop also includes two other very

important features. One is

non-synchronous

startup mode. Basically, the synchronous recti-

fier cannot turn on unless the high side switch

has attempted to turn on or the SS pin has

exceeded 1.7V. This feature prevents the con-

troller from “dragging down” the output voltage

during startup or in fault modes. The second

feature is a 100% duty cycle timeout that en-

sures synchronized refreshing of the BST ca-

pacitor at very high duty ratios. In the event that

the high side NFET is on for 20 continuous

clock cycles, a reset is given to the PWM flip-

flop half way through the 21st cycle. This forces

GL to rise for the cycle, in turn refreshing the

BST capacitor. The boost capacitor is used to

generate a high voltage drive supply for the high

side switch, which is 5V above VIN.

Power MOSFETs

The SP7655 contains a pair of integrated low

resistance N-channel switches designed to drive

up to 10 Amps of output current. Care should be

taken to de-rate the output current based on the

thermal conditions in the system such as ambi-

ent temperature, airflow and heat sinking. Maxi-

mum output current could be limited by thermal

limitations of a particular application by taking

advantage of the integrated-over-temperature

protective scheme employed in the SP7655.

The SP7655 incorporates a built-in over-tem-

perature protection to prevent internal overheat-

ing.

Voltage

V(VIN)

-0V

-V(Diode) V

V(VIN)+V(VCC)

BST

Voltage

V(VCC)

TIME

SWN

Voltage

VBST

VSWN

V(VCC)

The SP7655 can be set to different output volt-

ages. The relationship in the following formula

is based on a voltage divider from the output to

the feedback pin VFB, which is set to an internal

reference voltage of 0.80V. Standard 1% metal

film resistors of surface mount size 0603 are

recommended.

Vout = 0.80V ( R1 / RSET + 1 ) =>

Rset =

[( Vout / 0.80V ) – 1 ]

Where R1 = 68.1K and for VOUT = 0.80V

setting, simply remove RSET from the board. Fur-

thermore, one could select the value of the R1

and RSET combination to meet the exact output

voltagesettingbyrestrictingR1resistancerange

such that 50K < R1 < 100K for overall

system loop stability.

Setting Output Voltages

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