Sept12-06

SP7651 Evaluation Manual

©2006 Sipex Corporation

Page 5 of 8

TYPE III LOOP COMPENSATION DESIGN

The open loop gain of the SP7651EB can be divided into the gain of the error amplifier

Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback

resistor divider Gfbk. In order to cross over at the selecting frequency fco, the gain of

the error amplifier must compensate for the attenuation caused by the rest of the loop at

this frequency. The goal of loop compensation is to manipulate the open loop frequency

response such that its gain crosses over 0dB at a slope of –20dB/dec. The open loop

crossover frequency should be higher than the ESR zero of the output capacitors but

less than 1/5 to 1/10 of the switching frequency fs to insure proper operation. Since the

SP7651EB is designed with Ceramic Type output capacitors, a Type III compensation

circuit is required to give a phase boost of 180° in order to counteract the effects of the

output LC underdamped resonance double pole frequency.

(SRz2Cz2+1)(SR1Cz

3+1)

SR1Cz2(SRz3Cz3+1)(SRz2C

p1+1)

Vin

Vramp_p

p

(SResrCout+

1)

[S^2LCout+S(Resr+Rdc)Co

ut+1]

(R1+R2

)

R2

OR

Vout

Vref

Vout

(Volts

)

Vref

(Volts

)

Type III Voltage

Loop

(Volts

)

Vfbk

Gout(S)

Gain Block

Compensation Gamp(S)

PWM Stage

Output Stage

Gain Block

Gain Block

Gpwm

Gain Block

Gfbk

Voltage Feedback

Resr

:= Output Capacitor Equivalent Series Resitance

Definition

s:

Rdc

:= Output Inductor DC Resistance

Vramp_pp := SP7651 Internal RAMP Amplitude Peak to Peak Voltage

Output Load Resistance >> Resr and Rdc

Cz2 >> Cp1 and R1 >> Rz3

Condition

s:

Figure 11. Voltage Mode Control Loop with Loop Dynamic for Type III Compensation