ADA4941-1YRZ-R7 datasheet(6/23 Pages) AD

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ADA4941-1

Data Sheet

Rev. D | Page 6 of 23

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter

Rating

Supply Voltage

12 V

Power Dissipation

See Figure 3

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +85°C

Lead Temperature (Soldering 10 sec)

300°C

Junction Temperature

150°C

Stresses at or abovethoselisted under AbsoluteMaximum

Ratings may cause permanent damageto the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditionsfor extended periods may

affect product reliability.

THERMAL RESISTANCE

θJA is specified for the worst-caseconditions, that is, θJA is

specified for a device soldered in the circuit board with its

exposed paddle soldered to a pad (if applicable)on the PCB

surface that is thermally connected to a copperplane,with zero

airflow.

Table 5. Thermal Resistance

Package Type

θJA

θJC

Unit

8-Lead SOIC on 4-Layer Board

126

°C/W

8-Lead LFCSP with EP on 4-Layer Board

°C/W

MAXIMUM POWER DISSIPATION

The maximum safepower dissipation in the ADA4941-1

package is limited by the associated rise in junction temperature

(TJ) on the die. At approximately 150°C, which is the glass

transition temperature, the plasticchanges its properties. Even

temporarily exceeding this temperaturelimit can change the

stresses thatthe package exerts on the die, permanently shifting

the parametricperformanceof the ADA4941-1. Exceeding a

junction temperatureof 150°C for an extended period can

result in changes in the silicon devices potentially causing

failure.

The power dissipated in the package (PD)is the sum of the

quiescent powerdissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

power is the voltage between the supply pins (VS)times the

quiescent current (IS). The power dissipated due to the load

drive depends upon the particular application. For each output,

the power due to load drive is calculated by multiplying the load

current by the associated voltagedropacrossthe device. The

power dissipated due to all of the loads is equal to the sum of

the power dissipation dueto each individual load. RMS voltages

and currents must be usedin these calculations.

Airflow increases heat dissipation, effectively reducing θJA. In

addition, more metal directly in contact with the package leads

from metal traces, through holes, ground, and power planes

reduces the θJA. The exposed paddle on the undersideof the

package must be solderedto a pad on the PCB surface thatis

thermally connectedtoa copperplanetoachievethespecified θJA.

Figure 3 shows the maximum safe power dissipation in the

packages vs. the ambient temperaturefor the 8-lead SOIC

(126°C/W) and for the 8-lead LFCSP (83°C/W)on a JEDEC

standard 4-layer board. TheLFCSP must haveits underside

paddle soldered to a pad that is thermally connectedto a PCB

plane. θJA values are approximations.

2.5

–40

120

AMBIENT TEMPERATURE (°C)

2.0

1.5

1.0

0.5

–20

100

LFCSP

SOIC

Figure 3. MaximumPower Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

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