PIC12F683-ESLASHPQTP datasheet(66/176 Pages) MICROCHIP

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PIC12F683

DS41211D-page 64

9.2.4

ADC OPERATION DURING SLEEP

The ADC module can operate during Sleep. This

requires the ADC clock source to be set to the FRC

option. When the FRC clock source is selected, the

ADC waits one additional instruction before starting the

conversion. This allows the SLEEP instruction to be

executed, which can reduce system noise during the

conversion. If the ADC interrupt is enabled, the device

will

wake-up

from

Sleep

when

the

conversion

completes. If the ADC interrupt is disabled, the ADC

module is turned off after the conversion completes,

although the ADON bit remains set.

When the ADC clock source is something other than

FRC, a SLEEP instruction causes the present conver-

sion to be aborted and the ADC module is turned off,

although the ADON bit remains set.

9.2.5

SPECIAL EVENT TRIGGER

The CCP Special Event Trigger allows periodic ADC

measurements without software intervention. When

this trigger occurs, the GO/DONE bit is set by hardware

and the Timer1 counter resets to zero.

Using the Special Event Trigger does not assure proper

ADC timing. It is the user’s responsibility to ensure that

the ADC timing requirements are met.

See Section 11.0 “Capture/Compare/PWM (CCP)

Module” for more information.

9.2.6

A/D CONVERSION PROCEDURE

This is an example procedure for using the ADC to

perform an Analog-to-Digital conversion:

Configure GPIO Port:

• Disable pin output driver (See TRIS register)

• Configure pin as analog

Configure the ADC module:

• Select ADC conversion clock

• Configure voltage reference

• Select ADC input channel

• Select result format

• Turn on ADC module

Configure ADC interrupt (optional):

• Clear ADC interrupt flag

• Enable ADC interrupt

• Enable peripheral interrupt

• Enable global interrupt(1)

Wait the required acquisition time(2).

Start conversion by setting the GO/DONE bit.

Wait for ADC conversion to complete by one of

the following:

• Polling the GO/DONE bit

• Waiting for the ADC interrupt (interrupts

enabled)

Read ADC Result

Clear the ADC interrupt flag (required if interrupt

is enabled).

EXAMPLE 9-1:

A/D CONVERSION

9.2.7

ADC REGISTER DEFINITIONS

The following registers are used to control the

operation of the ADC.

Note 1: The global interrupt can be disabled if the

user is attempting to wake-up from Sleep

and resume in-line code execution.

2: See

Section 9.3

“A/D

Acquisition

Requirements”.

;This code block configures the ADC

;for polling, Vdd reference, Frc clock

;and GP0 input.

;

;Conversion start & polling for completion

; are included.

;

BANKSEL

TRISIO

;

BSF

TRISIO,0

;Set GP0 to input

BANKSEL

ANSEL

;

MOVLW

B’01110001’

;ADC Frc clock,

IORWF

ANSEL

; and GP0 as analog

BANKSEL

ADCON0

;

MOVLW

B’10000001’

;Right justify,

MOVWF

ADCON0

;Vdd Vref, AN0, On

CALL

SampleTime

;Acquisiton delay

BSF

ADCON0,GO

;Start conversion

BTFSC

ADCON0,GO

;Is conversion done?

GOTO

$-1

;No, test again

BANKSEL

ADRESH

;

MOVF

ADRESH,W

;Read upper 2 bits

MOVWF

RESULTHI

;Store in GPR space

BANKSEL

ADRESL

;

MOVF

ADRESL,W

;Read lower 8 bits

MOVWF

RESULTLO

;Store in GPR space

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