Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

Preview PDF HTML

25Q128FVPF Arkusz danych(PDF) 39 Page - Winbond

Numer części 25Q128FVPF
Szczegółowy opis  SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
PDF  99 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  WINBOND [Winbond]
Strona internetowa  http://www.winbond.com
Logo WINBOND - Winbond

25Q128FVPF Arkusz danych(HTML) 39 Page - Winbond

Back Button 25Q128FVPF Datasheet HTML 35Page - Winbond 25Q128FVPF Datasheet HTML 36Page - Winbond 25Q128FVPF Datasheet HTML 37Page - Winbond 25Q128FVPF Datasheet HTML 38Page - Winbond 25Q128FVPF Datasheet HTML 39Page - Winbond 25Q128FVPF Datasheet HTML 40Page - Winbond 25Q128FVPF Datasheet HTML 41Page - Winbond 25Q128FVPF Datasheet HTML 42Page - Winbond 25Q128FVPF Datasheet HTML 43Page - Winbond Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 99 page
background image
W25Q128FV
Publication Release Date: May 13, 2016
- 38 -
Revision M
8.2.9 Fast Read Quad Output (6Bh)
The Fast Read Quad Output (6Bh) instruction is similar to the Fast Read Dual Output (3Bh) instruction
except that data is output on four pins, IO0, IO1, IO2, and IO3. The Quad Enable (QE) bit in Status
Register-2 must be set to 1 before the device will accept the Fast Read Quad Output Instruction. The
Fast Read Quad Output Instruction allows data to be transferred at four times the rate of standard SPI
devices.
The Fast Read Quad Output instruction can operate at the highest possible frequency of FR (see AC
Electrical Characteristics). This is accompli
shed by adding eight “dummy” clocks after the 24-bit
address as shown in Figure 20. The dummy clocks allow the device's internal circuits additional time for
setting up the initial address. The input data during the dummy clocks is “don’t care”. However, the IO
pins should be high-impedance prior to the falling edge of the first data out clock.
/CS
CLK
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (6Bh)
High Impedance
8
9
10
28
29
30
32
33
34
35
36
37
38
39
4
0
24-Bit Address
23
22
21
3
2
1
0
*
31
31
/CS
CLK
Dummy Clocks
0
40
41
42
43
44
45
46
47
5
1
High Impedance
4
5
Byte 1
High Impedance
High Impedance
6
2
7
3
High Impedance
6
7
High Impedance
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
Byte 2
Byte 3
Byte 4
IO
0 switches from
Input to Output
IO
0
IO
1
IO
2
IO
3
IO
0
IO
1
IO
2
IO
3
= MSB
*
Figure 20. Fast Read Quad Output Instruction (SPI Mode only)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com