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SC338 Arkusz danych(PDF) 8 Page - Semtech Corporation

Numer części SC338
Szczegółowy opis  Ultra Low Output Voltage Dual Linear FET Controller
PDF  14 Pages
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Producent  SEMTECH [Semtech Corporation]
Strona internetowa  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC338 Arkusz danych(HTML) 8 Page - Semtech Corporation

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 2004 Semtech Corp.
www.semtech.com
SC338(A)
PRELIMINARY
POWER MANAGEMENT
may not be required. In this case a 0.1µF ceramic
capacitor will suffice. The input supply to the SC338(A)
should be bypassed with a 0.1µF ceramic capacitor.
MOSFETs: very low or low threshold N-channel MOSFETs
are required. Selecting FETs rated for V
GS of 2.7V or 4.5V
will depend upon the available drive voltage (6.9V from
12V in or 4.85V from 5V in), the output voltage and
output current. For the device to work under all
operating conditions, a maximum R
DS(ON) must be met to
ensure that the output will never go into dropout:
=
)
MAX
(
OUT
)
MAX
(
OUT
)
MIN
(
IN
)
MAX
)(
ON
(
DS
I
V
V
R
Note that R
DS(ON) must be met at all temperatures and at
the minimum V
GS condition.
Setting The Output Voltage: the adjust pins connect
directly to the inverting input of the error amplifiers, and
the output voltage is set using external resistors (please
refer to the Typical Application Circuit on page 1).
Using output 1 as an example, the output voltage can
be calculated as follows:
 +
=
2
R
1
R
1
5
.
0
V
OUT
The input bias current for the adjust pin is so low that it
can be safely ignored. To avoid picking up noise, it is
recommended that the total resistance of the feedback
chain be less than 100k
Ω.
Please see Table 1 on this page for recommended
resistor values for some standard output voltages. All
resistors are 1%, 1/10W.
The maximum output voltage that can be obtained from
each output is determined by the input supply voltage
and the R
DS(ON) and gate threshold voltage of the
external MOSFET. Assuming that the MOSFET gate
threshold voltage is sufficiently low for the output
voltage chosen and the worst-case drive voltage, V
OUT(MAX)
is given by:
)
MAX
)(
ON
(
DS
)
MAX
(
OUT
)
MIN
(
DRAIN
)
MAX
(
OUT
R
I
V
V
=
Applications Infomation (Cont.)
)
V
(
T
U
O
Vk
(
3
R
r
o
1
R
Ω)k
(
4
R
r
o
2
R
Ω)
5
0
.
10
.
1
10
.
0
1
2
.
10
.
4
10
.
0
1
5
.
10
.
0
20
.
0
1
5
.
23
.
5
43
.
1
1
3
.
34
.
3
63
.
1
1
Table 1: Recommended Resistor Values For SC338(A)
Design Example
Goal: 1.05V±5% @ up to 2.5A from 1.2V±5% and 5V±5%
Solution 1: no passive droop.
Total window for DC error, ripple and transient is ±52.5mV
Since this device is linear, and assuming that it has been
designed to not ever enter dropout, we do not have ripple
on the output.
The DC error for this output is the sum of:
V
REF accuracy = ±2.5% = ±26.3mV
Feedback chain tolerance = ±1% = ±10.5mV
Load regulation = ±0.25% = ±2.6mV
Set resistors per Table 1 should be 11.0k
Ω (top) and
10.0k
Ω (bottom).
Total DC error = ±3.75% = 39.4mV
This leaves ±1.25% = 13.1mV for the load transient ESR
spike, therefore:
=
=
m
2
.
5
A
5
.
2
mV
1
.
13
R
)
MAX
(
ESR
Bulk capacitance required is given by:
F
dV
t
dI
C
)
MIN
(
BULK
µ
=
Where dI is the maximum load current step, t is the
maximum regulator response time and dV is the



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