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SC453 Arkusz danych(PDF) 8 Page - Semtech Corporation |
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SC453 Arkusz danych(HTML) 8 Page - Semtech Corporation |
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8 / 23 page ![]() 8 © 2006 Semtech Corp. www.semtech.com POWER MANAGEMENT SC453 Device Package Temp Range(T J) SC453TSTRT TSSOP-28 -40°C to + 125°C SC453EVB EVALUATION BOARD Notes: 1. Only available in tape and reel packaging. A reel contains 2500 devices. 2. Lead-free package compliant with J-STD-020B. Qualified to support maximum IR reflow temperature of 260°C for 30 seconds. 3. This device is ESD sensitive. Use of standard ESD handling precautions is required. 4. All parameters subject to change without notice. 5. Lead-free product. This product is fully WEEE and RoHS compliant. Pin# Pin Name Pin Function 1 DRN This pin connects to the junction of the switching and synchronous MOSFETs. 2 TG Output gate drive for the switching (high-side) MOSFET. 3 BST Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap voltage for the high-side MOSFET. 4 SLP Sleep logic input signal. 5 SLPV Connect this pin to V CCA to select "VID Sleep Mode". Otherwise, "SLPV Sleep Mode" is selected and the voltage on this pin sets the DAC output during sleep. 6 BOOTV The voltage on this pin sets the BOOT-Up voltage. 7 PG# Start clock indicator - open drain output. Active low. 8 HYS Core Comparator Hysteresis. Connect to ground thru an external resistor called R HYS. Hysteresis current is established by an internal V REF voltage, 1.7V, divided by RHYS. 9 VID5 VID most significant bit main controller voltage programming DAC input. 10 VID4 VID input. Pin Configuration Ordering Information Pin Descriptions 1 2 3 4 5 6 7 8 V5 DRN TOP VIEW (28 Pin TSSOP) 27 28 15 16 BG TG PGND BST EN SLP CL SLPV CMP BOOTV CLRF PG# VCCA HYS 9 10 22 REFIN VID5 GND VID4 21 18 17 19 20 11 12 24 DAC VID3 CORE VID2 23 25 26 13 14 PG_DEL VID1 SS VID0 |
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