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MNSC140CORE Arkusz danych(PDF) 3 Page - Freescale Semiconductor, Inc |
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MNSC140CORE Arkusz danych(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 88 page ![]() Data Sheet Conventions MSC8122 Technical Data, Rev. 13 Freescale Semiconductor iii Figure 2. SC140 Extended Core Block Diagram SC140 Power Management Core Program Sequencer Address Register File Data ALU Register File Address ALU Data ALU EOnCE JTAG Xa Xb P QBus IRQs IRQs MQBus SQBus Local Bus 128 128 64 64 64 LIC PIC 128 128 SC140 Core QBus Interface Instruction Cache M1 RAM Notes: 1. The arrows show the data transfer direction. QBus Bank 1 QBus Bank 3 2. The QBus interface includes a bus switch, write buffer, fetch unit, and a control unit that defines four QBus banks. In addition, the QBC handles internal QBC memory contentions. |
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