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RT9711GS Arkusz danych(PDF) 2 Page - Richtek Technology Corporation |
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RT9711GS Arkusz danych(HTML) 2 Page - Richtek Technology Corporation |
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2 / 15 page ![]() RT9711 Preliminary 2 DS9711-04 March 2007 www.richtek.com Test Circuits Function Block Diagram Functional Pin Description Typical Application Circuit Note: A low-ESR 150 μF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details) Pin No. RT9711□B RT9711□S Pin Name Pin Function 1 5 FLG Open-Drain Fault Flag Output 2 1 GND Ground 3 4 EN Chip Enable (Active Low) 4 2, 3 VIN Power Input Voltage 5 6, 7, 8 VOUT Output Voltage Gate Control Output Voltage Detection Delay Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting FLG VOUT VIN EN GND VIN EN FLG VOUT GND RT9711 R L C OUT I L V OUT R FG C IN V IN V FLG OFF ON VIN EN FLG VOUT GND RT9711 Over -Current V BUS D+ D- GND USB Controller 1uF 150uF 10uF Supply Voltage 5V Pull-Up Resistor (10K to 100K) Ferrite Beads Data OFF ON |
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