LD49300 datasheet(15/20 Pages) STMICROELECTRONICS

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LD49300

Application hints

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8.8

Heatsinking PPAK package

The PPAK package uses the copper plane on the PCB as a heatsink. The tab of these

packages is soldered to the copper plane for heat sinking. It is also possible to use the PCB

ground plane a heatsink. This area can be the inner GND layer of a multi-layer PCB, or, in a

dual layer PCB, it can be an unbroken GND area on the opposite side where the IC is situated

with a dissipating area thermally connected through vias holes, filled by solder.

Figure 26 shows a curve for

JA of the PPAK package for different copper area sizes, using a

typical PCB with 1/16 in thick G10/FR4.

8.9

Adjustable regulator design

The LD49300 adjustable version allows fixing output voltage anywhere between 0.8V and 4.5V

using two resistors as shown in the typical application circuit. For example, to fix the R1 resistor

value between VOUT and the ADJ pin, the resistor value between ADJ and GND (R2) is

calculated by:

R2 = R1 [0.8/(VOUT - 0.8)]

Where VOUT is the desired output voltage.

It is suggested to use R1 values lower than 10K

Ω to obtain better load transient performances.

Even, higher values up to 100K

Ω are suitable.

8.10

Enable

The fixed output voltage versions of LD49300 feature an active high Enable input (EN) that

allows on-off control of the regulator. The EN input threshold is guaranteed between 0.4V and

1.4V, for simple logic interfacing. The regulator is set in shut down mode when VEN<0.4V and it

is in operating mode (VOUT activated) when VEN>1.4V. If not in use, the EN pin must be tied

directly to the VIN to keep the regulator continuously activated. The En pin must not be left at

high impedance.

Figure 26.

JA vs Copper Area for PPAK package

LD49300 Arkusz danych(PDF) 15 Page - STMicroelectronics