7 Detailed Description

7.1 Overview

The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-state buffers are general purpose high-speed non-

inverting and inverting buffers. They have high drive current outputs which enable high speed operation even

when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet

have speeds comparable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low

power Schottky inputs.

The ’HC365 and ’HCT365 are non-inverting buffers, whereas the ’HC366 is an inverting buffer. These devices

have two three-state control inputs (OE1 and OE2) which are NORed together to control all six gates.

The ’HCT365 logic families are speed, function and pin compatible with the standard LS logic family.

7.2 Functional Block Diagram

Functional Diagrams

HC365, HCT365

HC366

7.3 Device Functional Modes

Table 7-1. Function Table

INPUTS(1)

OUTPUTS (Y)(2)

OE 1

OE 2

A

HC/HCT 365

HCT 366

L

L

L

L

H

L

L

H

H

L

X

H

X

Z

Z

H

X

X

Z

Z

(1)

H = High Voltage Level, L = Low Voltage Level, X = Don’t Care

(2)

H = Driving High, L = Driving Low, Z = High Impedance State

CD54HC365, CD74HC365, CD54HCT365

CD74HCT365, CD54HC366, CD74HC366

SCHS180D – NOVEMBER 1997 – REVISED JULY 2022

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8

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