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HD3SS212ZXHT Arkusz danych(PDF) 11 Page - Texas Instruments |
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HD3SS212ZXHT Arkusz danych(HTML) 11 Page - Texas Instruments |
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11 / 24 page ![]() The HD3SS212 behaves as a two to one using high bandwidth pass gates. The input port is selected using the Dx_SEL pin according to Table 8-1. Table 8-1. Switch Control Logic CONTROL LINES SWITCHED I/O PINS(1) (2) Dx_SEL DCz(p) PIN z = 0, 1, 2 or 3 DCz(n) PIN z = 0, 1, 2 or 3 HPDC PIN AUXC(p) PIN AUXC(n) PIN L DAz(p) DAz(n) HPDA AUXA(p) AUXA(n) H DBz(p) DBz(n) HPDB AUXVB(p) AUXVB(n) (1) OE pin - For nomal operation, drive OE high. Driving the OE pin low will disable the switch to enable power savings. (2) The ports which are not selected by the Control Lines will be in High Impedance State. 8.4 Device Functional Modes The HD3SS212 can be operated in normal operation mode or in shut down mode. In normal operation, the input ports of the HD3SS212 are routed to the output ports according to Table 8-1. In shut down mode the HD3SS212 is disabled to enable power savings with a typical current consumption of 5 µA. The functional mode is selected through the OE input pin with High for normal operation and LOW for shut down. www.ti.com HD3SS212 SLAS822D – DECEMBER 2011 – REVISED DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 11 |
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