15/20

L9949

SPI INTERFACE ELECTRICAL CHARACTERISTCS

VS =8to 16 V, VCC = 4.5 to 5.5 V, Tj = -40 to 150 °C, unless otherwise specified. The voltages are refered to

GND and currents are assumed positive, when the current flows into the pin

.

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

Delay time from standby to active mode

tset

Delay Time

Switching from standby to active

mode. Time until output drivers are

enabled after CSN going to high.

200

µs

Inputs: CSN, CLK and DI

VINL

Input Low Level

VCC =5V

1.5

V

VINH

Input High Level

VCC =5V

3.5

V

VINHyst

Input Hystersis

VCC =5V

0.5

V

ICSNin

Pull Up Current at input CSN

VCSN = 3.5 V

-50

-25

-10

µA

ICLK in

Pull Down Current at input CLK

VCLK =1.5 V

10

25

50

µA

IDI in

Pull Down Current at input DI

VDI =1.5 V

10

25

50

µA

Cin

(1)

Input Capacitance at input CSN

or CLK

0 V<VCC < 5.5 V

10

15

pF

DI timing (see Fig. 9 )(2)

tCLK

Clock Period

VCC = 5 V

1000

ns

tCLKH

Clock High Time

VCC = 5 V

400

ns

tCLKL

Clock Low Time

VCC = 5 V

400

ns

tset CSN

CSN setup time, CSN low before

rising edge of CLK

VCC = 5 V

400

ns

tset CLK

CLK setup time, CLK high before

rising edge of CSN

VCC = 5 V

400

ns

tset DI

DI setup time

VCC = 5 V

200

ns

thold DI

DI hold time

VCC = 5 V

200

ns

tr-in

Rise Time of Input Signal

DI, CLK, CSN

VCC =5V

100

ns

tf-in

Fall Time of Input Signal

DI, CLK, CSN

VCC =5V

100

ns

DO

VDOL

Output Low Level

VCC =5V, ID =-4 mA

0.2

0.4

V

VDOH

Output High Level

VCC =5V, ID =-4 mA

VCC

-1.3

VCC

-1.0

V

VCC =5V, ID =-200 µA; Tj = 25°C

VCC

-0.8

V