MB85RS4MTY(AEC-Q100 Compliant)

DS501-00066-3v0-E

15



HIBERNATE

The HIBERNATE command shifts the LSI to a low power mode called “HIBERNATE mode”. The transition

to the HIBERNATE mode is carried out at the rising edge of CS after operation code in the HIBERNATE

command. However, when at least one SCK clock is inputted before the rising edge of CS after operation

code in the HIBERNATE command, this HIBERNATE command is canceled.

After the HIBERNATE mode transition, SCK and SI inputs are ignored and SO changes to a High-Z state.

Returning to an normal operation from the HIBERNATE mode is carried out after tRECHIB (Max 450 s) time

from the falling edge of CS (see the figure below). It is possible to return CS to H level before tRECHIB time.

However, it is prohibited to bring down CS to L level again during tRECHIB period.

Enter Hibernate Mode

CS

SCK

SI Invalid

Invalid

High-Z

Hibernate Mode Entry

67

012345

SO

0

101110

1

CS

CS

tRECHIB

Exit Hibernate Mode

Hibernate Mode Exit

tCSWL

From this time

Command input enable