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L9352B Arkusz danych(PDF) 18 Page - STMicroelectronics |
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L9352B Arkusz danych(HTML) 18 Page - STMicroelectronics |
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18 / 27 page ![]() Functional description L9352B 18/27 4.9 Diagnostic The status follows the input signal in normal operating conditions. If any error is detected the status is inverted. Table 9. Diagnostic Operating condition Test input TEST Enable input ENA Control input non-reg./reg. IN Power output/current reg. Q Status output ST Normal function L L L L L L H H L H/PWM L H/PWM OFF OFF OFF ON L L L H Open load or short to ground L L L L L L H H L H/PWM L H/PWM OFF OFF OFF ON X X H L Overload or short to supply Latched overload Reset latch Reset latch L L L L H H H –> L H H/PWM H/PWM X H/PWM –> L OFF OFF OFF OFF L L L L Overtemperature Latched overtemperature Reset latch Reset latch L L L L H H H –> L H H/PWM H/PWM X H/PWM –> L OFF OFF OFF OFF L L L L Recirculation error (reg.chn.) Latched error Reset latch Reset latch L L L L H H H –> L H PWM PWM X PWM –> L OFF OFF OFF OFF L L L L Clock failure (clock loss)(1) L L L L L L H H L H/PWM L H/PWM OFF OFF OFF OFF H H H L Drift(2) Failure No failure H H H H L L H H L H/PWM H/PWM H/PWM OFF OFF ON ON X X L H 1. during power on sequence only detected on channel 3 and 4 (see description). 2. This input combination is also used for an internal chip-test and must not be used. |
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