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L3000 Arkusz danych(PDF) 23 Page - STMicroelectronics |
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L3000 Arkusz danych(HTML) 23 Page - STMicroelectronics |
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23 / 29 page ![]() TEST CIRCUITS Figure 1 : Symmetry to Ground. RL = 20 log |ZL − Z| |ZL + Z| = 20 log |2 VS| |E| 1 WC << Z Figure 2 : 2W Return Loss. APPENDIX SLIC TEST CIRCUITS Referring to the test circuit reported at the end of each SLIC data sheet here below you can find the proper configuration for each measurement. In particular : A-B : Line terminals C : TX sending output on 4W side D : RX receiving input on 4W side E : TTX teletaxe signal input RGIN : low level ringing signal input. THL = 20 log10 |VS| |VR| Figure 3 : Trans-hybrid Loss. GS = 20 log10 |VR| |VSO| Figure 4 : SendingGain. L3000S - L3030 23/29 |
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