L4918 datasheet(3/6 Pages) STMICROELECTRONICS

3 / 6 page

ELECTRICAL CHARACTERISTICS (Tamb =25

°C; Vi = 13.5 V, unless otherwise specified)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Input Voltage

Output Voltage

Vi =12 to18 V

IO = 5 to 150 mA

8.1

8.5

8.9

∆VI/O

Controlled

Input-output

Dropout

Voltage

Vi = 5 to 10 V

IO = 5 to 150 mA

1.6

2.1

∆VO

Line Regulation

Vi =12 to18 V

IO =10 mA

120

∆VO

Load Regulation

IO = 5 to 250 mA

ton =30

µs

toff =

≥ 1ms

100

∆VO

Load Regulation

(filter mode)

Vi = 8.5 V

IO = 5 to 150 mA

ton =30

µs

toff =

≥ 1ms

150

250

Quiescent Current

IO = 5 mA

∆Iq

Quiescent Current Change

Vi = 6 to 18 V

IO = 5 to 150 mA

0.05

∆VO

∆T

Output Voltage Drift

IO = 10 mA

1.2

mV/

°C

SVR

Supply Voltage Rejection

Viac =1 Vrms

f = 100 Hz

IO = 150 mA

VIDC =12 to 18 V

VIDC = 6 to 11 V

35(*)

ISC

Short Circuit Current

250

300

ton

Switch On Time

IO = 150 mA

Vi = 5 to 11 V

Vi =11 to18 V

500(*)

300

TJSD

Thermal

Shutdown

Junction

Temperature

150

°C

(*) Depending of the CFT capacitor

PRINCIPLE OF OPERATION

During normal operation (input voltage upper than

VI MIN =VOUT NOM +

∆VI/O). The device works as a

normal voltage regulator built around the OP1 of the

block diagram.

The series pass element use a PNP-NPN connec-

tion to reduce the dropout. The reference voltage of

the OP1 is derived from a REF through the OP2 and

Q3, acting as an active zener diode of value VREF.

In this condition the device works in the range (1) of

the characteristic of the non linear drop control unit

(see fig.2).

The output voltage is fixed to its nominal value:

VOUT NOM =VREF (1 +

) = VCFT (1 +

)

= INTERNALLY FIXED RATIO = 2.4

The ripple rejection is quite high (71 dB) and inde-

pendent from CFT value.

On the usual voltage regulators, when the input volt-

age goes below the nominal value, the regulation

transistors (series element) saturate bringing the

system out of regulation making it very sensible to

every variation of the input voltage. Onthe contrary,

a control loop on the L4918 consents to avoid the

saturation of the series element by regulating the

value of the reference voltage (pin 2). In fact, when-

ever the input voltagedecreasesbelow VIMIN the su-

pervisor loop, utilizing a non linear OTA, forces the

reference voltage at pin 2 to decrease by discharg-

ing CFT. So, during the static mode, when the input

voltage goes below VMIN the drop out is kept fixed

to about 1.6 V. In this condition the device works as

a low pass filter in the range (2) of the OTA charac-

L4918

3/6

L4918 Arkusz danych(PDF) 3 Page - STMicroelectronics

L4918 Arkusz danych(HTML) 3 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6

Arkusz danych Pobierz

Link URL