8-4

MS622424

MOSEL VITELIC

MS622424 Rev. 1.0 January 1995

Internal Registers

Command Register

The Command Register is an 8-bit register.

CB5–CB7

CB4

CB3

CB2

CB1

CB0

D7

D0

CB0

PIPE.IN0 reset

This bit is internally ANDed with PIPE.IN0 . Thus when CB0 is “0”, then

PIPE.OUT0 will always be “0”

CB1

PIPE.IN1 reset

This bit is internally ANDed with PIPE.IN1 . Thus when CB1 is “0”, then

PIPE.OUT1 will always be “0”

CB2

PIPE.IN2 set

This bit is internally ORed with PIPE.IN2 . Thus when CB2 is “1”, then

PIPE.OUT2 will always be “1”

CB3

PIPE.IN3 set

This bit is internally ORed with PIPE.IN3 . Thus when CB3 is “1”, then

PIPE.OUT3 will always be “1”

CB4

HFB/AFB

This bit programs the AFB flag indicator. When this bit is “0” the AFB pin

will indicate that the FIFO is half full. When this bit is “1” AFB will indicate

almost full.

CB5–CB7

Reserved

Reserved for internal use.

Status Register

The Status Register is an 8-bit register.

SB5–SB7

SB4

SB3

SB2

SB1

SB0

D7

D0

SB0

RGB0

LSB of RGB counter. RGB0 and RGB1 form two bits of a modulo three

counter that determines which color is operated on (read only).

SB1

RGB1

MSB of RGB data counter (read only).

SB2

EFB

Empty Flag; Write FIFO is empty when this bit is low.

SB3

HFB/AFB

Half or Almost-Full Flag; Like the external AFB pin, this bit can be

programmed by CB4 to indicate that the Write FIFO is at least half full or

at least 7/8 full (eight or fewer empty locations left). This pin is active low.

SB4

FFB

Full Flag; Write FIFO is full when this bit is low.

SB5–SB7

Reserved

Reserved for internal use.

Revision Register

The Revision Register is an 8-bit register.

RVB4–RVB7

RVB3

RVB2

RVB1

RVB0

D7

D0

RVB0

REV0

LSB of Revision Register. This register is mask programmed to indicate

the revision number.

RVB1

REV1

Second bit of Revision Register.

RVB2

REV2

MSB of Revision Register.

RVB3

Reserved

Reserved for internal use.

RVB4–RVB7

REV4–7

Corresponds to board revision input BD.REV0–3