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MBI5031
16-channel PWM-Embedded LED Driver
March 2006, V1.00
- 7 -
Switching Characteristics (VDD= 5.0V)
Characteristics
Symbol
Condition
Min.
Typ.
Max.
Unit
SDI - DCLK↑
tSU0
1
-
-
ns
LE↑ – DCLK↑
tSU1
1
-
-
ns
Setup Time
LE↓ – DCLK↑
tSU2
5
-
-
ns
DCLK↑ - SDI
tH0
3
-
-
ns
Hold Time
DCLK↑ - LE↓
tH1
7.0
-
-
ns
DCLK - SDO
tPD0
15.0
22.0
35.0
ns
GCLK –
n
4
OUT
* tPD1
-
130
-
ns
Propagation Delay Time
LE – SDO**
tPD2**
16.0
24.0
37.0
ns
1
n
4
OUT
+ *
tDL1
-
30.0
-
ns
2
n
4
OUT
+ *
tDL2
-
60.0
-
ns
Stagger Delay Time
3
n
4
OUT
+ *
tDL3
-
90.0
-
ns
LE
tw(L)
5.0
-
-
ns
DCLK
tw(DCLK)
20.0
-
-
ns
Pulse Width
GCLK
tw(GCLK)
125.0
-
-
ns
Output Rise Time of Output Ports
tOR
-
90.0
-
ns
Output Fall Time of Output Ports
tOF
-
70.0
-
ns
Error Detection Minimum Duration
tEDD***
VDD=5.0V
VIH=VDD
VIL=GND
Rext=460Ω
VLED=4.5V
RL=152Ω
CL=10pF
C1=100nF
C2=10μF
-
2.0
-
μ
s
*There will be one GCLK latency at the first PWM output data. Refer to the Timing Waveform, where n=0, 1, 2, 3.
**In timing of “Read Configuration” and “Read Error Status Code”, the next DCLK rising edge should be tPD2 after the
falling edge of LE.
***Refer to Figure 6.
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