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M25P05 Arkusz danych(PDF) 20 Page - STMicroelectronics |
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M25P05 Arkusz danych(HTML) 20 Page - STMicroelectronics |
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20 / 32 page ![]() M25P05 20/32 Figure 18. Release from Deep Power-down (RES) Sequence Driving Chip Select (S) High after the 8-bit instruc- tion byte has been received by the device, but be- fore the whole of the 8-bit Electronic Signature has been transmitted for the first time (as shown in Fig- ure 18), still insures that the device is taken out of the Deep Power-down mode, but incurs a delay (tRES) before the device is put in Standby mode. Chip Select (S) must remain High for at least tRES(max), as specified in Table 14. C D AI03754C S 2 1 34567 0 tRES Stand-by Mode Deep Power-down Mode Q High Impedance Instruction |
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