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M28W160BT Arkusz danych(PDF) 5 Page - STMicroelectronics

Numer części M28W160BT
Szczegółowy opis  16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory
PDF  45 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M28W160BT Arkusz danych(HTML) 5 Page - STMicroelectronics

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M28W160BT, M28W160BB
SUMMARY DESCRIPTION
The M28W160B is a 16 Mbit (1 Mbit x 16) non-vol-
atileFlash memory that canbeerasedelectrically
at the block level and programmed in-system on a
Word-by-Word basis. These operations can be
performed using a single low voltage (2.7 to 3.6V)
supply. VDDQ allows to drive the I/O pin down to
1.65V. An optional 12V VPP power supply is pro-
vided to speed up customer programming.
The device features an asymmetrical blocked ar-
chitecture. The M28W160B has an array of 39
blocks: 8 Parameter Blocks of 4 KWord and 31
Main Blocks of 32 KWord. M28W160BT has the
Parameter Blocks at the top of the memory ad-
dress space while the M28W160BB locates the
Parameter Blocks starting from the bottom. The
memory maps are shown in Figure 6, Block Ad-
dresses.
Parameter blocks 0 and 1 can be protected from
accidental programming or erasure. Each block
can be erased separately. Erase can be suspend-
ed in order to perform either read or program in
any other block and then resumed. Program can
be suspended to read data in any other block and
then resumed. Each block can be programmed
and erased over 100,000 cycles.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller takes care of the tim-
ings necessary for program and erase operations.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The memory is offered in TSOP48 (10 X 20mm),
µBGA46 (6.39 x 6.37mm, 0.75mm pitch) and
TFBGA46 (6.39 x 6.37mm, 0.75mm pitch) packag-
es and is supplied with all the bits erased (set to
’1’).
Figure 2. Logic Diagram
Table 1. Signal Names
A0-A19
Address Inputs
DQ0-DQ15
Data Input/Output
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset
WP
Write Protect
VDD
Core Power Supply
VDDQ
Power Supply for
Input/Output
VPP
Optional Supply Voltage for
Fast Program & Erase
VSS
Ground
AI02628
20
A0-A19
W
DQ0-DQ15
VDD
M28W160BT
M28W160BB
E
VSS
16
G
RP
WP
VDDQ VPP



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