R7KA8M2AFDCAM datasheet(217/295 Pages) RENESAS

Numer części	R7KA8M2AFDCAM

Szczegółowy opis	Renesas Microcontrollers

PDF	295 Pages

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Producent	RENESAS [Renesas Technology Corp]

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Note 1. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5ns and less

than 2.0ns will be added to the associated clock signal.

Note 2. For 10Mbps and 100Mbps, Tcyc will scale to 400ns+-40ns and 40ns+-4ns respectively.

Note 3. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domain as long as

minimum duty cycle is not violated and stretching occurs for no more than three Tcyc of the lowest speed transitioned between.

TskewT

RGMIIn_TXC

RGMIIn_TXD[3:0]

RGMIIn_TX_CTL

TskewT

TskewR

RGMIIn_RXC

RGMIIn_RXD[3:0]

RGMIIn_RX_CTL

TskewR

Figure 2.117

RGMII timing

RGMIIn_TXC

RGMIIn_TXD[3:0]

RGMIIn_TX_CTL

RGMIIn_RXC

RGMIIn_RXD[3:0]

RGMIIn_RX_CTL

TsetupT TholdT TsetupT TholdT

TsetupR TholdR TsetupR TholdR

Figure 2.118

RGMII timing (RGMII-ID)

RA8M2 Datasheet

2. Electrical Characteristics

R01DS0438EJ0130 Rev.1.30

Feb 27, 2026

Page 217 of 295

R7KA8M2AFDCAM Arkusz danych(PDF) 217 Page - Renesas Technology Corp