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FE2.1 Arkusz danych(PDF) 7 Page - Terminus Technology Inc.

Numer części FE2.1
Szczegółowy opis  USB 2.0 HIGH SPEED 7-PORT HUB CONTROLLER
PDF  20 Pages
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Producent  TERMINUS [Terminus Technology Inc.]
Strona internetowa  https://www.terminus.com.tw/en/home.html
Logo TERMINUS - Terminus Technology Inc.

FE2.1 Arkusz danych(HTML) 7 Page - Terminus Technology Inc.

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USB 2.0 7-Port Hub
Data Sheet Rev. 1.01
DM3
20
13
UTD
The D- pin of the 3rd Downstream Facing Port.
DP3
21
14
UTD
The D+ pin of the 3rd Downstream Facing Port.
DM2
23
16
UTD
The D- pin of the 2nd Downstream Facing Port.
DP2
24
17
UTD
The D+ pin of the 2nd Downstream Facing Port.
DM1
26
18
UTD
The D- pin of the 1st Downstream Facing Port.
DP1
27
19
UTD
The D+ pin of the 1st Downstream Facing Port.
VD_PLL
29
21
P
1.8V Power for PLL.
XIN
30
22
OSC
12 MHz Crystal Oscillator input
XOUT
31
23
OSC
12 MHz Crystal Oscillator output.
VS_PLL
32
24
P
Ground for PLL.
VD18_O
33
25
P
1.8V power output from 3.3V→1.8V integrated regulator – a
10μF decoupling capacitor is required.
REXT
35
27
A
A 2.7KΩ (± 1%) resister should be connected to VSS to provide
internal bias reference.
DMU
38
29
UTU
The D- pin of the Upstream Facing Port.
DPU
39
30
UTU
The D+ pin of the Upstream Facing Port.
DM5
41
32
UTD
The D- pin of the 5th Downstream Facing Port.
DP5
42
33
UTD
The D+ pin of the 5th Downstream Facing Port.
DM6
44
34
UTD
The D- pin of the 6th Downstream Facing Port.
DP6
45
35
UTD
The D+ pin of the 6th Downstream Facing Port.
DM7
47
37
UTD
The D- pin of the 7th Downstream Facing Port.
DP7
48
38
UTD
The D+ pin of the 7th Downstream Facing Port.
XRSTJ
50
40
I
External Reset, active low, is an optional source of chip reset
signal. The minimum low pulse width is 10 μs.
VBUSM
51
41
I
The VBUS Monitor of upstream facing port.
PWRJ[7]
52
OD/
I-PU
Power Enable for 7th Downstream Facing Port, active low, and
Power Control Mode Configuration bit 1.
2
OVCJ[7]
53
I-PU
Over-current Detect for 7th Downstream Facing Port, active low. 1
PWRJ[6]
54
OD/
I-PU
Power Enable for 6th Downstream Facing Port, active low, and
Power Control Mode Configuration bit 1.
2
OVCJ[6]
55
I-PU
Over-current Detect for 6th Downstream Facing Port, active low. 1
PWRJ[5]
57
OD
Power Enable for 5th Downstream Facing Port, active low.
OVCJ[5]
58
43
I-PU
Over-current Detect for 5th Downstream Facing Port, active low. 1
PWRJ[1]
59
44
OD
Power Enable for 1st Downstream Facing Port, active low.
OVCJ[1]
60
45
I
Over-current Detect for 1st Downstream Facing Port, active low. 1, 3
PWRJ[2]
61
OD
Power Enable for 2nd Downstream Facing Port, active low.
Jul. 16, 2009
Subject to Change Without Notice
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