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MK68564 Arkusz danych(PDF) 13 Page - STMicroelectronics

Numer części MK68564
Szczegółowy opis  SERIAL INPUT OUTPUT
PDF  46 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
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For example, when the time constant register is loa-
ded with ”01H” and divide by four is selected, one
output clock will occur for every four input clocks. If
the time constant value loaded is ”00H” (256 deci-
mal) instead of ”01H” and divide by 64 is selected,
one output clock will occur for every 16384 input
clocks. Note that the minimum count value is ”01H”
(1 decimal), and the maximum count value is ”00H”
(256 decimal).
The output of the baud rate generator may be pro-
grammed to drive the transmitter (BRG output on
TxC), the receiver (BRG output on RxC), both (BRG
output on TxC and RxC), or neither (TxC and RxC
are inputs). After a reset, the baud rate generator is
disabled, divide by four is selected, and TxC and
RxC are inputs.
The baud rate generator should be disabled before
the CPU writes to the time constant register. This is
necessary because no attempt was made to syn-
chronize the loading of a new time constant with the
clock used to drive the BRG.
Figure 8 indicates the external components needed
to connect a crystal oscillator to the SIO XTAL in-
puts. The allowed crystal parameters are also listed.
For a 3.6864MHz input signal to the baud rate ge-
nerator, the time constants, listed in table 2, are loa-
ded to obtain the desired baud rates (in x1 clock
mode).
Figure 8 : SIO External Oscillator Components.
Table 2 : Time-Constant Values.
R a te
Tim e Constant
D ivide By
Error
19200
9 600
7 200
4 800
3 600
2 400
2 000
1 800
1 200
600
300
48
96
128
192
256
24
29
32
48
96
192
4
4
4
4
4
64
64
64
64
64
64
69 %
CRYSTAL PARAMETERS :
Parallel Resonance, FundamentalMode AT Cut
Rs â 150
Ω (Fr = 2.8 - 5.0MHz)
Rs â 300
Ω (Fr = 2.0 - 2.7MHz)
CI = 18pf ; Cm = 0.02pF ; Ch = 5pF ; Lm = 96MHz
Fr (typ) = 2.457MHz
ASYNCHRONOUS OPERATION
INTRODUCTION
Many types of Asynchronous operations are perfor-
med by the MK68564 SIO. Figure 9 represents a ty-
pical Asynchronous message format and some of
the options available on the SIO. The transmit pro-
cess inserts start, stop, and parity bits to a variable
data format and supplies a serial data stream to the
Transmit Data output (TxD). The receiver takes the
data from the Receive Data input (RxD) and strips
away expected start and stop bits at a programmed
clock rate. It provides error checking for overrun, pa-
rity, and carrier-loss errors, and, if desired, provides
interrupts for these conditions.
To set up the SIO for Asynchronous operation, the
following registers need to be initialized : Mode
Control Register, Interrupt Control Register, Recei-
ver Control Register, and Transmitter Control
Register. The Mode Control Register must be
programmed before the other registers to assure
proper operation of the SIO. The following registers
are used to transfer data or to communicate status
between the SIO and the CPU or other bus master
when
operating
in
Asynchronous
modes
:
Command Register, Status Register 0, Status Re-
gister 1, Data Register, and the Vector Register.
MK68564
13/46



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