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653 Arkusz danych(PDF) 9 Page - Nexperia B.V. All rights reserved |
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653 Arkusz danych(HTML) 9 Page - Nexperia B.V. All rights reserved |
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9 / 17 page ![]() 74HC_HCT174 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 4 — 12 May 2016 9 of 17 NXP Semiconductors 74HC174; 74HCT174 Hex D-type flip-flop with reset; positive-edge trigger 11. Waveforms Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input to output propagation delay, output transition time, clock input pulse width, set-up and hold times for data input and maximum frequency Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Master reset to output propagation delays, master reset pulse width and master reset to clock recovery time |
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