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ADA2200 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części ADA2200
Szczegółowy opis  Low Power LVDT Signal Conditioner with Synchronous Demodulation
PDF  6 Pages
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Strona internetowa  http://www.analog.com
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ADA2200 Arkusz danych(HTML) 4 Page - Analog Devices

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CN-0371
Circuit Note
Figure 3. Position Linearity Error vs. LVDT Core Displacement
The measured data shows that the circuit performance is better
than the linearity specified in the E-Series LVDT data sheet.
Synchronous Operation of Multiple LVDTs
In many applications, multiple LVDTs are used in close proximity.
If the LVDTs operate at similar carrier frequencies, stray magnetic
coupling can cause generation of beat notes. The resulting beat
notes can interfere with the accuracy of measurements made
under these conditions. To avoid this situation, all LVDTs must
be synchronized.
Multiple ADA2200 devices can be synchronized by bringing the
devices out of reset simultaneously. The ADA2200 leaves reset
mode on the first rising edge of CLKIN after the RST pin is
deasserted. Therefore, driving all of the ADA2200 CLKIN pins
from a single source and all of the RESETB lines from a single
source is sufficient to ensure the devices operate synchronously.
Avoid deasserting RESETB near the rising edge of CLKIN to
prevent the device resets from occurring on different clock
edges. The RCLK outputs of the ADA2200 devices can be
monitored to ensure that the ADA2200 devices are properly
synchronized.
COMMON VARIATIONS
In some systems, it may be desirable to use a SAR ADC instead
of a Σ-Δ converter. In these cases, the ADC conversion clock
must be synchronized with the ADA2200 update rate. As
described previously, the ADA2200 output will contain spurs
at multiples of the excitation frequency. These spurs can be
rejected with a moving average filter or by cascading multiple
moving average filters. Moving average filters are easy to
implement and exhibit excellent time-domain characteristics.
To completely reject the spurs, the moving average sample size
must be an integer multiple of 8 samples.
Figure 4 shows the ADA2200 connected to the AD7091R-2, an
ultralow power, dual channel, 12-bit SAR ADC. A dual channel
ADC is used so that the OUTP and OUTN outputs of the
ADA2200 can be sampled sequentially. Because the ADA2200
outputs are discrete time samples, differential measurements can
be made by performing the difference operation, VOUTP − VOUTN,
on the two sequential output samples.
Figure 4. Differential Sampling with Dual Channel SAR ADC
The SYNCO signal goes active each ADA2200 output sample
period. SYNCO can be used to interrupt the microcontroller
to take a pair of ADC samples (to sample OUTP and OUTN).
In the case demonstrated, the sample period is at 8 times the
excitation clock frequency or 38.4 kHz; therefore, the ADC
samples at a rate of 76.8 kSPS.
CIRCUIT EVALUATION AND TEST
The CN-0371 circuit uses the EVAL-CN0371-SDPZ circuit
board and the EVAL-SDP-CB1Z SDP-B controller board. The
two boards have 120-pin mating connectors, allowing quick
setup and evaluation of the performance of the circuit. The
circuit board contains the circuit to be evaluated, and the SDP-B
board is used with the CN-0371 Evaluation Software to capture
the data from the circuit board.
Equipment Needed
The following equipment is needed:
•
A PC with a USB port and Windows® XP (32-bit),
Windows Vista®, or Windows 7
•
The EVAL-CN0371-SDPZ circuit board
•
The EVAL-SDP-CB1Z SDP-B controller board
•
The CN-0371 Evaluation Software
•
Measurement Specialties, Inc., E-100 Economy Series LVDT
(EVAL-CFTL-LVDT)
Getting Started
Download the CN0371.zip file and run the setup.exe file. By
default, the program is installed in the Analog Devices directory.
The program name is CN0371.
Functional Block Diagram
See Figure 5 for the circuit block diagram. For the complete circuit
schematic, see the EVAL-CN0371-SDPZ-Schematic.pdf file,
which can be found in the CN-0371 Design Support Package.
The 5 V supply for the circuit board is supplied by the USB bus
via the SDP-B board 120-pin connector.
Figure 5. Test Setup Block Diagram
0.10
0.05
0
–0.05
DISPLACEMENT (mm)
–0.10
–0.15
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
–0.20
OUTP
MICROCONTROLLER
2:1
MUX
12-BIT
ADC
ADA2200
AD7091R-2
OUTN
SYNCO
CLKIN
IRQ
CLK0
CONVST
SEQUENCER
SDI
CS
SDO
SCLK
P0.1
MOSI
CS
MISO
SCLK
MEASUREMENT
SPECIALTIES, INC.
E-100 SERIES LVDT
EVAL-CFTL-LVDT
P1
P3
CON A
USB
PC
EVAL-CN0371-SDPZ
BOARD
EVAL-SDP-CB1Z
SDP-B BOARD
120
PINS
Rev. 0 | Page 4 of 6



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