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74LVC08ADB Arkusz danych(PDF) 7 Page - Nexperia B.V. All rights reserved |
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74LVC08ADB Arkusz danych(HTML) 7 Page - Nexperia B.V. All rights reserved |
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7 / 15 page ![]() 74LVC08A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 7 — 19 April 2016 7 of 15 NXP Semiconductors 74LVC08A Quad 2-input AND gate Test data is given in Table 8. Definitions for test circuit: RL = Load resistance CL = Load capacitance including jig and probe capacitance RT = Termination resistance should be equal to output impedance Zo of the pulse generator Fig 7. Test circuit for measuring switching times Table 8. Test data Supply voltage Input Load VI tr, tf CL RL 1.2 V VCC 2 ns 30 pF 1 k 1.65 V to 1.95 V VCC 2 ns 30 pF 1 k 2.3 V to 2.7 V VCC 2 ns 30 pF 500 2.7V 2.7V 2.5 ns 50 pF 500 3.0Vto 3.6V 2.7V 2.5 ns 50 pF 500 |
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