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74LVC86APW Arkusz danych(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74LVC86APW Arkusz danych(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 15 page ![]() © Nexperia B.V. 2017. All rights reserved 74LVC86A All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 5 — 19 October 2011 12 of 15 Nexperia 74LVC86A Quad 2-input EXCLUSIVE-OR gate 13. Abbreviations 14. Revision history Table 9. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC86A v.5 20111019 Product data sheet - 74LVC86A v.4 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges. 74LVC86A v.4 20040304 Product specification - 74LVC86A v.3 74LVC86A v.3 20031111 Product specification - 74LVC86A v.2 74LVC86A v.2 19980428 Product specification - 74LVC86A v.1 74LVC86A v.1 ---- |
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