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NRF52811-QFAA-R7 Arkusz danych(PDF) 39 Page - Nordic Semiconductor

Numer części NRF52811-QFAA-R7
Szczegółowy opis  nRF52811
PDF  444 Pages
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Producent  NORDIC [Nordic Semiconductor]
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Core components
• Two literal comparators
• Six instruction comparators
4.8.1 DAP - Debug access port
An external debugger can access the device via the DAP.
The debug access port (DAP) implements a standard ARM® CoreSight™ serial wire debug port (SW-DP),
which implements the serial wire debug protocol (SWD). SWD is a two-pin serial interface, see SWDCLK
and SWDIO in Overview on page 38.
In addition to the default access port in CPU (AHB-AP), the DAP includes a custom control access port
(CTRL-AP). The CTRL-AP is described in more detail in CTRL-AP - Control access port on page 39.
Note:
• The SWDIO line has an internal pull-up resistor.
• The SWDCLK line has an internal pull-down resistor.
4.8.2 CTRL-AP - Control access port
The control access port (CTRL-AP) is a custom access port that enables control of the device when other
access ports in the DAP are disabled by the access port protection.
Access port protection blocks the debugger from read and write access to all CPU registers and memory-
mapped addresses. See the UICR register APPROTECT on page 35 for more information on enabling
access port protection.
Control access port has the following features:
• Soft reset, see Reset on page 52 for more information
• Disabling of access port protection, which is the reason why CTRL-AP allows control of the device even
when all other access ports in the DAP are disabled by the access port protection
Access port protection is disabled by issuing an ERASEALL command via CTRL-AP. This command will erase
the flash, UICR, and RAM.
4.8.2.1 Registers
Register
Offset
Description
RESET
0x000
Soft reset triggered through CTRL-AP
ERASEALL
0x004
Erase all
ERASEALLSTATUS
0x008
Status register for the ERASEALL operation
APPROTECTSTATUS
0x00C
Status register for access port protection
IDR
0x0FC
CTRL-AP identification register, IDR
Table 12: Register overview
4.8.2.1.1 RESET
Address offset: 0x000
Soft reset triggered through CTRL-AP
4454_140 v1.0
39



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