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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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ST10F163 Arkusz danych(PDF) 55 Page - STMicroelectronics |
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ST10F163 Arkusz danych(HTML) 55 Page - STMicroelectronics |
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55 / 58 page  ST10F163 55/58 The transition of shift and latch edge of SSPCLK is programmable. This figure uses the falling edge as shift edge (drawn bold). The bit timing is repeated for all bits to be transmitted or received. The active level of the chip enable lines is programmable. This figure uses an active low CE (drawn bold). At the end of a transmission or reception the CE signal is disabled in single transfer mode. In continuous transfer mode it remains active. Figure 26 : SSP read timing t211 SSPCLK SSPCEx SSPDAT t 209 t 206 last Wr. Bit Lst.In Bit 1) 3) 2) t212 1st.In Bit t 210 |
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