MDT2020(FF)

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P. 6

2007/8

VER 1.5

8. Instruction Set

Instruction Code

Mnemonic

Operands

Function

Operating

Status

010000 00000000 NOP

No operation

None

010000 00000001 CLRWT

Clear Watchdog timer

0→WT

TF, PF

010000 00000010 SLEEP

Sleep mode

0→WT,stop OSC

TF, PF

010000 00000011 TMODE

Load W to TMODE register

W→TMODE

None

010000 00000100 RET

Return

Stack→PC

None

010000 00000rrr

CPIO

R

Control I/O port register

W→CPIO

r

None

010001 1rrrrrrr

STWR

R

Store W to register

W→R

None

011000 trrrrrrr

LDR R， t

Load register

R→t

Z

111010 iiiiiiii

LDWI

I

Load immediate to W

I→W

None

010111 trrrrrrr

SWAPR R，t

Swap halves register

[R(0~3)

↔

R(4~7)]→t

None

011001 trrrrrrr

INCR

R，t

Increment register

R + 1→t

Z

011010 trrrrrrr

INCRSZ R，

Increment register，skip if

zero

R + 1→t

None

011011 trrrrrrr

ADDWR R，t Add W and register

W + R→t

C，HC，Z

011100 trrrrrrr

SUBWR R，t

Subtract W from register

R ﹣W→t

(R+/W+1→t)

C，HC，Z

011101 trrrrrrr

DECR R，t

Decrement register

R ﹣1→t

Z

011110 trrrrrrr

DECRSZ R，t Decrement register，

skip if zero

R ﹣1→t

None

010010 trrrrrrr

ANDWR R，t AND W and register

R ∩ W→t

Z

110100 iiiiiiii

ANDWI I

AND W and immediate

I ∩ W→W

Z

010011 trrrrrrr

IORWR R，t

Inclu. OR W and register

R ∪ W→t

Z

110101 iiiiiiii

IORWI I

Inclu. OR W and immediate I ∪ W→W

Z

010100 trrrrrrr

XORWR R，t Exclu. OR W and register

R ♁ W→t

Z

110110 iiiiiiii

XORWI I

Exclu. OR W and immediate I ♁ W→W

Z

011111 trrrrrrr

COMR R， t

Complement register

/R→t

Z

010110 trrrrrrr

RRR R，t

Rotate right register

R(n)→R(n-1)，

C→R(7) R(0)→C

C

010101 trrrrrrr

RLR

R， t

Rotate left register

R(n)→(n+1)，

C→R(0) R(7)→C

C

010000 1xxxxxxx

CLRW

Clear working register

0→W

Z

010001 0rrrrrrr

CLRR

R

Clear register

0→R

Z

0000bb brrrrrrr

BCR

R， b

Bit clear

0→R(b)

None

0010bb brrrrrrr

BSR

R， b

Bit set

1→R(b)

None