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LM397MFX Arkusz danych(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części LM397MFX
Szczegółowy opis  Single General Purpose Voltage Comparator
PDF  8 Pages
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM397MFX Arkusz danych(HTML) 4 Page - National Semiconductor (TI)

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Application Notes
Basic Comparators
A comparator is quite often used to convert an analog signal
to a digital signal. The comparator compares an input volt-
age (V
IN) at the non-inverting pin to the reference voltage
(V
REF) at the inverting pin. If VIN is less than VREF the output
(V
O) is low (VOL). However, if VIN is greater than VREF, the
output voltage (V
O) is high (VOH). Refer to Figure 2.
Hysteresis
The basic comparator configuration may oscillate or produce
a noisy output if the applied differential input is near the
comparator’s input offset voltage. This tends to occur when
the voltage on the input is equal or very close to the other
input voltage. Adding hysteresis can prevent this problem.
Hysteresis creates two switching thresholds (one for the
rising input voltage and the other for the falling input volt-
age). Hysteresis is the voltage difference between the two
switching thresholds. When both inputs are nearly equal,
hysteresis causes one input to effectively move quickly pass
the other. Thus, effectively moving the input out of region that
oscillation may occur.
For an inverting configured comparator, hysteresis can be
added with a three resistor network and positive feedback.
When input voltage (V
IN) at the inverting node is less than
non-inverting node (V
T), the output is high. The equivalent
circuit for the three resistor network is R
1 in parallel with R3
and in series with R
2. The lower threshold voltage VT1 is
calculated by:
V
T1 = ((VS R2) / (((R1 R3)/(R1 +R3))+R2))
When V
IN is greater than VT, the output voltage is low. The
equivalent circuit for the three resistor network is R
2 in
parallel with R
3 and in series with R1. The upper threshold
voltage V
T2 is calculated by:
V
T2 =VS ((R2 R3)/(R2 +R3))/(R1 + ((R2 R3)/(R2 +
R
3)))
The hysteresis is defined as
∆V
IN =VT1 –VT2
20022110
20022111
FIGURE 2. Basic Comparator
20022112
20022113
FIGURE 3. Inverting Configured Comparator – LM397
www.national.com
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