SSM2604CPZ-R2 datasheet(21/28 Pages) AD

21 / 28 page

SSM2604

Rev. 0 | Page 21 of 28

POWER MANAGEMENT, ADDRESS 0x06

Table 19. Power Management Register Bit Map

PWROFF

CLKOUT

OSC

DAC

ADC

LINEIN

Table 20. Description of Power Management Register Bits

Bit Name

Description

Settings

PWROFF

Whole chip power-down control

0 = power up

1 = power down (default)

CLKOUT

Clock output power-down control

0 = power up (default)

1 = power down

OSC

Crystal power-down control

0 = power up (default)

1 = power down

DAC

DAC power-down control

0 = power up

1 = power down (default)

ADC

ADC power-down control

0 = power up

1 = power down (default)

LINEIN

Line input power-down control

0 = power up

1 = power down (default)

Power Consumption

Table 21.

Mode

PWROFF

CLKOUT

OSC

DAC

ADC

LINEIN

AVDD

(3.3 V)

DVDD

(3.3 V)

Unit

Record and Playback

9.41

3.7

Playback Only

Oscillator Enabled

4.45

1.9

External Clock

4.56

1.9

Record Only

Line Clock

4.31

2.0

Line Oscillator

4.33

2.0

Analog Bypass

(Line Input or Line Output)

External Line

1.88

0.21

Internally Generated Line

1.88

0.25

Power-Down

External Clock

0.002

0.015

Oscillator

0.002

0.015

SSM2604CPZ-R2 Arkusz danych(PDF) 21 Page - Analog Devices

SSM2604CPZ-R2 Arkusz danych(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Arkusz danych Pobierz

Link URL