M41ST84W datasheet(24/34 Pages) STMICROELECTRONICS

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Clock operation

M41ST84W

24/34

3.8

Reset input (RSTIN)

The M41ST84W provides an independent input which can generate an output reset. The

duration and function of this reset is identical to a reset generated by a power cycle. Table 6

and Figure 16 illustrate the AC reset characteristics of this function. Pulses shorter than

tRLRH will not generate a reset condition. RSTIN is internally pulled up to VCC through a 100

Ω resistor.

Figure 16.

RSTIN timing waveform

Note:

With pull-up resistor

Table 6.

Reset AC characteristics

3.9

Power-fail INPUT/OUTPUT

The power-fail input (PFI) is compared to an internal reference voltage (1.25 V). If PFI is less

than the power-fail threshold (VPFI), the power-fail output (PFO) will go low. This function is

intended for use as an under-voltage detector to signal a failing power supply. Typically PFI

is connected through an external voltage divider (see Figure 4 on page 9) to either the

unregulated DC input (if it is available) or the regulated output of the VCC regulator. The

voltage divider can be set up such that the voltage at PFI falls below VPFI several

milliseconds before the regulated VCC input to the M41ST84W or the microprocessor drops

below the minimum operating voltage.

During battery backup, the power-fail comparator turns off and PFO goes (or remains) low.

This occurs after VCC drops below VPFD(min). When power returns, PFO is forced high,

irrespective of VPFI for the write protect time (trec), which is the time from VPFD(max) until the

inputs are recognized. At the end of this time, the power-fail comparator is enabled and PFO

follows PFI. If the comparator is unused, PFI should be connected to VSS and PFO left

unconnected.

AI03682

RST

(1)

RSTIN

tRLRH

tRHRSH

Symbol

Parameter(1)

Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6 V (except where noted).

Min

Max

Unit

tRLRH

(2)

Pulse width less than 50 ns will result in no RESET (for noise immunity).

RSTIN low to RSTIN high

200

tRHRSH

(3)

Programmable (see Table 8 on page 26)

RSTIN high to RST high

200

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