STLC60134 datasheet(1/22 Pages) STMICROELECTRONICS

Numer części	STLC60134

Szczegółowy opis	TOSCA INTEGRATED ADSL CMOS ANALOG FRONT-END CIRCUIT

PDF	22 Pages

Scroll/Zoom	100%

Producent	STMICROELECTRONICS [STMicroelectronics]

Strona internetowa	http://www.st.com

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FULLY INTEGRATED AFE FOR ADSL

OVERALL 12 BIT RESOLUTION, 1.1MHz

SIGNAL BANDWIDTH

8.8MS/s ADC

8.8MS/s DAC

THD: -60dB @FULL SCALE

4-BIT DIGITAL INTERFACE TO/FROM THE

DMT MODEM

1V FULL SCALE INPUT

DIFFERENTIAL ANALOG I/O

ACCURATE CONTINUOUS-TIME CHANNEL

FILTERING

3rd & 4th ORDER TUNABLE CONTINUOUS

TIME LP FILTERS

0.5 WATT AT 3.3V

0.5

µm HCMOS5 LA TECHNOLOGY

64 PIN TQFP PACKAGE

DESCRIPTION

STLC60134S is the Analog Front End of the

STMicroelectronics Tosca

™ ADSL chipset and

when coupled with STLC60135 (DTM modem) al-

lows to get a T1.413 Issue 2 compliant solution.

The STLC60134S analog front end handles 2

transmission channels on a balanced 2 wire inter-

connection; a 16 to 640Kbit/s upstream channel

and a 1.536 to 8.192Mbit/s downstream channel.

A 256 carrier DMT coding (frequency spacing

4.3125kHz) transforms the downstream channel

to a 1MHz bandwidth analog signal (tones 32-

255) and the upstream channel (tones 8-31) to a

100kHz bandwidth signal on the line.

This asymmetrical data transmission system uses

high resolution, high speed analog to digital and

digital to analog conversion and high order ana-

log filtering to reduce the echo and noise in both

August 1999

®

1.1MHz

HC2

1.1MHz

HC1

138KHz

SC2

R-MOS-C

TUNING

I/V-REF

XTAL-DRIVER

VCXO

DAC

+

-

ADC

ERROR

CORRECTION

ANALOG

LOOP

DIGITAL

LOOP

MUX

DAC

MUX

13 bits

4 bits

12 bits

4 bits

DIGITAL

IF

G=-15...0dB

step=1dB

G=0..31dB

step=1dB

AGCtx

AGCrx

TXP

TXN

RXP(0:1)

RXN(0:1)

D99TL453

Figure 1. Block Diagram

TQFP64

ORDERING NUMBER: STLC60134S

STLC60134S

TOSCA

™ INTEGRATED ADSL CMOS

ANALOG FRONT-END CIRCUIT

1/22

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