L9380

Functional description

11/18

Figure 5.

Comparator hysteresis

The application diagram is shown in Figure 6. Because of the transients present at the

power lines during operation and possible disturbances in the system the external resistors

are necessary.

Positive ISO-Pulses at Drain, Gate Source are clamped with an active clamping structure.

The clamping voltage is less than 60V. Negative Pulses are only clamped with the ESD-

Structure less than -15 V. This transients lower than -15 V can influence the other channels.

In order to protect the transistor against overload and gate breakdown protection diodes

between gate and source and gate and drain has to be connected. In case of overvoltage

(see Figure 1). In this case the channels are not influenced. In reverse battery condition the

pins D1, D2, S1, S2 follow the battery potential down to -13 V (high impedance) and the

gate driver pins G1, G2 is referred to S1, S2. In this way it is assured that M1 and M2 will not

down to -15 V. The gate driver output G3 is referred to the D1 in this case. This function

guarantees that the source to source connected N-Channel MOS transistors M3 and M4

remains OFF.

All the supplies and the in- and output of the PC Board are supplied with a 40 wires flat

cable (not used wires are left open). This cable is submitted to the RF in the strip-line like

described in DIN 40839-4 or ISO 11456-5.

The measured circuit was build up on a PCB board with ground plane. In the frequency

range from 1 MHz to 400 MHz and 80 % AM-modulation of 1 kHz with field strength of

200 V/m no influence to the basic function was detected on a typical device.

The failure criteria is an envelope of the output signal with 20 % in the amplitude and 2 % in

the time.

-10mV

+10mV

D98AT394