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L5959 Arkusz danych(PDF) 12 Page - STMicroelectronics |
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L5959 Arkusz danych(HTML) 12 Page - STMicroelectronics |
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12 / 19 page ![]() Electrical specification L5959 12/19 tpor RST POR delay time CRSTDLY = 0.1 µF 20 30 50 ms Tglitch Glitch rejection filter time 5 12.5 20 µs ENABLE INPUT (VREGSW, V8P5, V810, HSD1, HSD2) VIH Threshold recognized as high level 2.0 V VIL Threshold recognized as low level 0.8 V VHYSEN Hysteresis of enable 0.15 0.35 V ILKGEN Enable input pull-down current VEN = VIL(mIN) to VSTBY 10 30 50 µA 1. Drop condition means that the supply voltage drop down to 100 mV from the regulated output and the regulator is sourcing its maximal load. 2. Stability Request is design info, not tested. Table 5. Electrical characteristics (continued) (VS = 14.4V; Tamb = 25°C; unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit |
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